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19-1578; Rev 0; 12/99
Dual, 10-Bit, 40MHz Current/Voltage Alternate-Phase Output DACs
General Description
The MAX5182 is a dual, 10-bit, alternate-phase-update, current-output digital-to-analog converter (DAC) designed for superior performance in systems requiring analog signal reconstruction with low distortion and low-power operation. The MAX5185 provides equal specifications, with on-chip output resistors for voltageoutput operation. Both devices are designed for 10pV-s glitch operation, to reduce distortion and minimize unwanted spurious signal components at the output. An on-board +1.2V bandgap circuit provides a well-regulated, low-noise reference that can be disabled for external reference operation. The MAX5182/MAX5185 are designed to provide a high level of signal integrity for the least amount of power dissipation. Both DACs operate from a +2.7V to +3.3V single supply. Additionally, these DACs have three modes of operation: normal, low-power standby, and complete shutdown. A full shutdown provides the lowest possible power dissipation with a maximum shutdown current of 1A. Fast wake-up time (0.5s) from standby mode to full DAC operation allows for power conservation by activating the DACs only when required. The MAX5182/MAX5185 are available in a 28-pin QSOP package and are specified for the extended (-40C to +85C) temperature range. For pin-compatible 8-bit versions, refer to the MAX5188/MAX5191 data sheet.
Features
o +2.7V to +3.3V Single-Supply Operation o Wide Spurious-Free Dynamic Range: 70dB at fOUT = 2.2MHz o Fully Differential Outputs for Each DAC o 0.5% FSR Gain Mismatch Between DAC Outputs o Low-Current Standby or Full Shutdown Modes o Internal +1.2V Low-Noise Bandgap Reference o Small 28-Pin QSOP Package
MAX5182/MAX5185
Ordering Information
PART MAX5182BEEI MAX5185BEEI TEMP. RANGE -40C to +85C -40C to +85C PIN-PACKAGE 28 QSOP 28 QSOP
Pin Configuration Applications
Signal Reconstruction Digital Signal Processing Arbitrary Waveform Generators (AWGs) Imaging Applications
CREF1 1 OUT1P 2 OUT1N 3 AGND 4 AVDD 5 DACEN 6 PD 7 CS 8 CLK 9 N.C. 10 REN 11 D0 12 D1 13 D2 14 28 CREF2 27 OUT2P 26 OUT2N 25 REFO 24 REFR
TOP VIEW
MAX5182 MAX5185
23 DGND 22 DVDD 21 D9 20 D8 19 D7 18 D6 17 D5 16 D4 15 D3
QSOP ________________________________________________________________ Maxim Integrated Products 1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 1-800-835-8769.
Dual, 10-Bit, 40MHz Current/Voltage Alternate-Phase Output DACs MAX5182/MAX5185
ABSOLUTE MAXIMUM RATINGS
AVDD, DVDD to AGND, DGND .................................-0.3V to +6V Digital Inputs to DGND.............................................-0.3V to +6V OUT1P, OUT1N, OUT2P, OUT2N, CREF1, CREF2 to AGND ...................................................-0.3V to +6V VREF to AGND ..........................................................-0.3V to +6V AGND to DGND.....................................................-0.3V to +0.3V AVDD to DVDD .................................................................... 3.3V Maximum Current into Any Pin............................................50mA Continuous Power Dissipation (TA = +70C) 28-Pin QSOP (derate 9.00mW/C above +70C)....... 725mW Operating Temperature Ranges MAX518_BEEI................................................-40C to +85C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10sec) ............................ +300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(AVDD = DVDD = +3V 10%, AGND = DGND = 0, fCLK = 40MHz, IFS = 1mA, 400 differential output, CL = 5pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) dB PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS STATIC PERFORMANCE Resolution Integral Nonlinearity Differential Nonlinearity Zero-Scale Error Full-Scale Error DYNAMIC PERFORMANCE Output Settling Time Glitch Impulse Spurious-Free Dynamic Range to Nyquist Total Harmonic Distortion to Nyquist Signal-to-Noise Ratio to Nyquist DAC-to-DAC Ouput Isolation Clock and Data Feedthrough Output Noise Gain Mismatch Between DAC Outputs ANALOG OUTPUT Full-Scale Output Voltage Voltage Compliance of Output Output Leakage Current Full-Scale Output Current DAC External Output Resistor Load IFS RL DACEN = 0, MAX5182 only MAX5182 only MAX5182 only VFS -0.3 -1 0.5 1 400 400 0.8 1 1.5 mV V A mA fOUT = 2.2MHz SFDR THD SNR fCLK = 40MHz fCLK = 40MHz fCLK = 40MHz fOUT = 2.2MHz All 0s to all 1s fOUT = 550kHz fOUT = 2.2MHz fOUT = 550kHz fOUT = 2.2MHz fOUT = 550kHz fOUT = 2.2MHz 56 57 To 0.5LSB error band 25 10 72 70 -70 -68 61 59 -60 50 10 0.5 1 -63 ns pVs dBc dB dB dB nVs pA/Hz % FSR N INL DNL Guaranteed monotonic MAX5182 MAX5185 (Note 1) 10 -2 -1 -2 -8 -40 15 0.5 0.5 +2 +1 +2 +8 +40 Bits LSB LSB LSB LSB
2
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Dual, 10-Bit, 40MHz Current/Voltage Alternate-Phase Output DACs MAX5182/MAX5185
ELECTRICAL CHARACTERISTICS (continued)
(AVDD = DVDD = +3V 10%, AGND = DGND = 0, fCLK = 40MHz, IFS = 1mA, 400 differential output, CL = 5pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER REFERENCE Output Voltage Range Output Voltage Temperature Drift Reference Output Drive Capability Reference Supply Rejection Current Gain (IFS / IREF) POWER REQUIREMENTS Analog Power-Supply Voltage Analog Supply Current Digital Power-Supply Voltage Digital Supply Current Standby Current Shutdown Current LOGIC INPUTS AND OUTPUTS Digital Input Voltage High Digital Input Voltage Low Digital Input Current Digital Input Capacitance TIMING CHARACTERISTICS DAC1 DATA to CLK Rise Setup Time DAC2 DATA to CLK Fall Setup Time DAC1 CLK Rise to DATA Hold Time DAC2 CLK Fall to DATA Hold Time CS Fall to CLK Rise Time CS Fall to CLK Fall Time DACEN Rise Time to VOUT_ PD Fall Time to VOUT_ Clock Period Clock High Time Clock Low Time tCLK tCH tCL 25 10 10 0 tDS1 tDS2 tDH1 tDH2 10 10 0 0 5 5 0.5 50 ns ns ns ns ns ns s s ns ns ns VIH VIL IIN CIN VIN = 0 or DVDD 10 2 0.8 1 V V A pF AVDD IAVDD DVDD IDVDD ISTANDBY ISHDN PD = 0, DACEN = 1, digital inputs at 0 or DVDD PD = 0, DACEN = 0, digital inputs at 0 or DVDD PD = 1, DACEN = X, digital inputs at 0 or DVDD (X = don't care) PD = 0, DACEN = 1, digital inputs at 0 or DVDD 2.7 4.2 1.0 0.5 2.7 2.7 3.3 5.0 3.3 5.0 1.5 1 V mA V mA mA A VREF TCVREF IREFOUT 2.7 1.2 50 10 0.5 8 1.28 V ppm/C A mV/V mA/mA SYMBOL CONDITIONS MIN TYP MAX UNITS
Note 1: Excludes reference and reference resistor (MAX5185) tolerance. _______________________________________________________________________________________ 3
Dual, 10-Bit, 40MHz Current/Voltage Alternate-Phase Output DACs MAX5182/MAX5185
Typical Operating Characteristics
(AVDD = DVDD = +3V, AGND = DGND = 0, 400 differential output, IFS = 1mA, CL = 5pF, TA = +25C, unless otherwise noted.)
INTEGRAL NONLINEARITY vs. INPUT CODE
MAX5182/85-01
DIFFERENTIAL NONLINEARITY vs. INPUT CODE
MAX5182/85-02
ANALOG SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX5182/85-03
0.6 0.5 0.4
0.4 0.3 0.2 DNL (LSB) 0.1 0 -0.1 -0.2 -0.3
3.00 ANALOG SUPPLY CURRENT (mA)
2.75
MAX5185
0.3 INL (LSB) 0.2 0.1 0 -0.1 -0.2 0 128 256 384 512 640 768 896 1024 INPUT CODE
2.50
MAX5182
2.25
2.00 0 128 256 384 512 640 768 896 1024 INPUT CODE 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V)
ANALOG SUPPLY CURRENT vs. TEMPERATURE
MAX5182/85-04
DIGITAL SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX5182/85-05
DIGITAL SUPPLY CURRENT vs. TEMPERATURE
MAX5182/85-06
3.00 ANALOG SUPPLY CURRENT (mA)
10 DIGITAL SUPPLY CURRENT (mA)
4.00 DIGITAL SUPPLY CURRENT (mA) MAX5182 3.75 MAX5185 3.50
2.75
MAX5185
8 6 MAX5182 MAX5185 4 2
2.50
MAX5182
2.25
3.25
2.00 -40 -15 10 35 60 85 TEMPERATURE (C)
0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V)
3.00 -40 -15 10 35 60 85 TEMPERATURE (C)
STANDBY CURRENT vs. SUPPLY VOLTAGE
MAX5182/85-07
MAX5182/MAX5185 STANDBY CURRENT vs. TEMPERATURE
MAX5182/85-08
SHUTDOWN CURRENT vs. SUPPLY VOLTAGE
MAX5182/85-09
620 610 STANDBY CURRENT (A) MAX5185 600 590 MAX5182 580 570 560 2.5 3.0 3.5 4.0 4.5 5.0
600 MAX5185 STANDBY CURRENT (mA) 590
0.8
SHUTDOWN CURRENT (A)
0.7
580
0.6
MAX5182 MAX5185
570
MAX5182
560
0.5
550 5.5 -40 -15 10 35 60 85 SUPPLY VOLTAGE (V) TEMPERATURE (C)
0.4 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V)
4
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Dual, 10-Bit, 40MHz Current/Voltage Alternate-Phase Output DACs MAX5182/MAX5185
Typical Operating Characteristics (continued)
(AVDD = DVDD = +3V, AGND = DGND = 0, 400 differential output, IFS = 1mA, CL = 5pF, TA = +25C, unless otherwise noted.)
INTERNAL REFERENCE VOLTAGE vs. SUPPLY VOLTAGE
MAX5182/85-11
INTERNAL REFERENCE VOLTAGE vs. TEMPERATURE
MAX5182/85-12
OUTPUT CURRENT vs. REFERENCE CURRENT
MAX5182/85-13
1.28
1.28
4
REFERENCE VOLTAGE (V)
REFERENCE VOLTAGE (V)
1.27
1.27
1.26 MAX5182 1.25 MAX5185 1.24
1.26
MAX5182
OUTPUT CURRENT (mA)
3
2
1.25 MAX5185 1.24
1
1.23 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V)
1.23 -40 -15 10 35 60 85 TEMPERATURE (C)
0 0 125 250 375 500 REFERENCE CURRENT (A)
DYNAMIC RESPONSE RISE TIME
MAX5182/85-14
DYNAMIC RESPONSE FALL TIME
MAX5182/85-15
SETTLING TIME
MAX5182/85-16
OUT_P 150mV/ div
OUT_P 150mV/ div
OUT_N 100mV/ div
OUT_N 150mV/ div
OUT_N 150mV/ div
OUT_P 100mV/ div
50ns/div
50ns/div
12.5ns/div
FFT PLOT, DAC1
MAX5181/4toc17
FFT PLOT, DAC2
MAX5182/85-18
SPURIOUS-FREE DYNAMIC RANGE vs. CLOCK FREQUENCY
MAX5182/85-19
0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 0 2 4 6 8
fOUT = 2.2MHz fCLK = 40MHz
0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120
100 90 80 SFDR (dBc) DAC2 70 60 50 40 DAC1
fOUT = 2.2MHz fCLK = 40MHz
(dBc)
(dBc)
10 12 14 16 18 20
0
2
4
6
8
10 12 14 16 18 20
10 15 20 25 30 35 40 45 50 55 60 CLOCK FREQUENCY (MHz)
OUTPUT FREQUENCY (MHz)
OUTPUT FREQUENCY (MHz)
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Dual, 10-Bit, 40MHz Current/Voltage Alternate-Phase Output DACs MAX5182/MAX5185
Typical Operating Characteristics (continued)
(AVDD = DVDD = +3V, AGND = DGND = 0, 400 differential output, IFS = 1mA, CL = 5pF, TA = +25C, unless otherwise noted.)
SPURIOUS-FREE DYNAMIC RANGE vs. OUTPUT FREQUENCY AND CLOCK FREQUENCY, DAC1
MAX5182/85-20
SPURIOUS-FREE DYNAMIC RANGE vs. OUTPUT FREQUENCY AND CLOCK FREQUENCY, DAC2
fCLK = 50MHz fCLK = 20MHz fCLK = 40MHz 76 74 SFDR (dBc) SINAD (dB) 61.5
MAX5182/85-21
SIGNAL-TO-NOISE PLUS DISTORTION vs. OUTPUT FREQUENCY
MAX5182/85-23
78 fCLK = 40MHz 76 74 SFDR (dBc) 72 70 68 66 fCLK = 20MHz fCLK = 60MHz
78
62.5
62.0
DAC2 DAC1
72 70 68 66 fCLK = 10MHz fCLK = 60MHz
61.0
fCLK = 50MHz fCLK = 10MHz fCLK = 30MHz
60.5 fCLK = 30MHz 60.0 500 700 900 1100 1300 1500 1700 1900 2100 2300 OUTPUT FREQUENCY (kHz) 0 500 1000 1500 2000 2500 OUTPUT FREQUENCY (kHz)
500 700 900 1100 1300 1500 1700 1900 2100 2300 OUTPUT FREQUENCY (kHz)
MULTITONE SPURIOUS-FREE DYNAMIC RANGE vs. OUTPUT FREQUENCY
MAX5182/85-25
SPURIOUS-FREE DYNAMIC RANGE vs. FULL-SCALE OUTPUT CURRENT
MAX5182/85-26
20 0 -20 SFDR (dBc)
74 72 70 SFDR (dBc) 68 66 64 62 60
-40 -60 -80 -100 -120 -140 0 2 4 6 8 10 12 14 16 18 20 OUTPUT FREQUENCY (MHz)
0.50
0.75
1.00
1.25
1.50
FULL-SCALE OUTPUT CURRENT (mA)
6
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Dual, 10-Bit, 40MHz Current/Voltage Alternate-Phase Output DACs
______________________________________________________________Pin Description
PIN 1 2 3 4 5 NAME CREF1 OUT1P OUT1N AGND AVDD Reference Bias Bypass, DAC1 Positive Analog Output, DAC1. Current output for MAX5182; voltage output for MAX5185. Negative Analog Output, DAC1. Current output for MAX5182; voltage output for MAX5185. Analog Ground Analog Positive Supply, +2.7V to +3.3V DAC Enable, Digital Input 0: Enter DAC standby mode with PD = DGND 1: Power-up DAC with PD = DGND X: Enter shutdown mode with PD = DVDD (X = don't care) Power-Down Select 0: Enter DAC standby mode (DACEN = DGND) or power-up DAC (DACEN = DVDD) 1: Enter shutdown mode Active-Low Chip Select Clock Input No Connection. Do not connect to this pin. Active-Low Reference Enable. Connect to DGND to activate the on-chip +1.2V reference. Data Bit D0 (LSB) to Data Bit D9 (MSB) Digital Supply, +2.7V to +3.3V Digital Ground Reference Input Reference Output Negative Analog Output, DAC2. Current output for MAX5182; voltage output for MAX5185. Positive Analog Output, DAC2. Current output for MAX5182; voltage output for MAX5185. Reference Bias Bypass, DAC2 FUNCTION
MAX5182/MAX5185
6
DACEN
7 8 9 10 11 12-21 22 23 24 25 26 27 28
PD CS CLK N.C. REN D0-D9 DVDD DGND REFR REFO OUT2N OUT2P CREF2
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7
Dual, 10-Bit, 40MHz Current/Voltage Alternate-Phase Output DACs MAX5182/MAX5185
REN 1.2V REF AVDD AGND CS DACEN PD
REFO REFR CURRENTSOURCE ARRAY
CREF1 CREF2
9.6k* DAC 1 SWITCHES DAC 2 SWITCHES 400 * 400 * 400 * OUTPUT LATCHES MSB DECODE CLK INPUT LATCHES OUTPUT LATCHES MSB DECODE INPUT LATCHES 400 *
OUT1P OUT1N OUT2P OUT2N
MAX5182 MAX5185
DVDD DGND
*INTERNAL 400 AND 9.6k RESISTORS FOR MAX5185 ONLY.
D9-D0
Figure 1. Functional Diagram
Detailed Description
The MAX5182/MAX5185 are dual 10-bit digital-to-analog converters (DACs) capable of operating with clock speeds up to 40MHz. Each of these dual converters consists of separate input and DAC registers, followed by a current-source array capable of generating up to 1.5mA full-scale output current (Figure 1). An integrated +1.2V voltage reference and control amplifier determine the data converters' full-scale output currents/voltages. Careful reference design ensures close gain matching and excellent drift characteristics. The MAX5185, with its voltage output operation, features matched 400 onchip resistors that convert the current from the current array into a voltage.
REFO pin must be buffered with an external amplifier if heavier loading is required. The MAX5182/MAX5185 also employ a control amplifier designed to simultaneously regulate the full-scale output current IFS for both outputs of the ICs. The output current is calculated as follows: IFS = 8 * IREF where I REF is the reference output current (I REF = VREFO/RSET), and IFS is the full-scale output current. R SET is the reference resistor that determines the amplifier's output current (Figure 2) on the MAX5182. This current is mirrored into the current-source array, where it is equally distributed between matched current segments, and summed to valid output current readings for the DACs. Inside the MAX5185, each output current (DAC1 and DAC2) is converted to an output voltage (V OUT1 , VOUT2) with two internal, ground-referenced 400 load resistors. Using the internal +1.2V reference voltage, the MAX5185's integrated reference output current resistor (RSET = 9.6k), sets IREF to 125A and IFS to 1mA.
Internal Reference and Control Amplifier
The MAX5182/MAX5185 provide an integrated 50ppm/C, +1.2V, low-noise bandgap reference, which can be disabled and overridden by an external reference voltage. REFO serves either as an input for an external reference or as an output for the integrated reference. If REN is connected to DGND, the internal reference is selected and REFO provides a +1.2V output. Due to its limited 10A output drive capability, the
8
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Dual, 10-Bit, 40MHz Current/Voltage Alternate-Phase Output DACs MAX5182/MAX5185
OPTIONAL EXTERNAL BUFFER FOR HEAVIER LOADS REN MAX4040 +1.2V BANDGAP REFERENCE REFO CCOMP* REFR VREF RSET CURRENTSOURCE ARRAY IFS DGND
AGND
IREF
IREF =
RSET AGND
RSET ** 9.6k
MAX5182 MAX5185
*COMPENSATION CAPACITOR (COMP 100nF)
**9.6k REFERENCE CURRENT-SET RESISTOR INTERNAL TO MAX5185 ONLY. USE EXTERNAL RSET FOR MAX5182.
Figure 2. Setting IFS with the Internal +1.2V Reference and the Control Amplifier
DVDD 10F REN +1.2V BANDGAP REFERENCE REFO CURRENTSOURCE ARRAY IREF RSET AGND 9.6k* IFS 0.1F DGND
AVDD
EXTERNAL +1.2V REFERENCE
REFR
MAX6520
AGND
MAX5182 MAX5185
*9.6k REFERENCE CURRENT-SET RESISTOR INTERNAL TO MAX5185 ONLY. USE EXTERNAL RSET FOR MAX5182.
Figure 3. MAX5182/MAX5185 with External Reference _______________________________________________________________________________________ 9
Dual, 10-Bit, 40MHz Current/Voltage Alternate-Phase Output DACs MAX5182/MAX5185
tCLK tCL tCH
CLK N-1 D0-D9 tDS1 DAC1 tDS1 DAC2 N-1 DAC1 tDH1 N DAC2 tDH2 N DAC1 N+1 DAC2 N+1
OUT1
N-1
N
N+1
OUT2
N-1
N
N+1
Figure 4. Timing Diagram
Table 1. Power-Down Mode Selection
PD (POWER-DOWN SELECT) 0 0 1 X = Don't care DACEN (DAC ENABLE) 0 1 X POWER-DOWN MODE Standby Wake-Up Shutdown OUTPUT STATE MAX5182 MAX5185 MAX5182 MAX5185 High-Z AGND High-Z AGND
Last state prior to standby mode
External Reference
To disable the MAX5182/MAX5185's internal reference, connect REN to DVDD. A temperature-stable, external reference may now be applied to drive the REFO pin (Figure 3) to set the full-scale output. Be sure to choose a reference capable of supplying at least 150A to drive the bias circuit that generates the cascode current for the current array. For improved accuracy and drift performance, chose a fixed output voltage reference such as the +1.2V, 25ppm/C MAX6520 bandgap reference.
Shutdown Mode
For lowest power consumption, the MAX5182/MAX5185 provide a power-down mode in which the reference, control amplifier, and current array are inactive and the DACs supply current is reduced to 1A. To enter this mode, connect PD to DVDD. To return to active mode, connect PD to DGND and DACEN to DVDD. About 50s are required for the devices to leave the shutdown mode and to settle their outputs to the values prior to shutdown. Table 1 lists the power-down mode selection.
Timing Information
Both internal DAC cells write to their outputs in alternate phase (Figure 4). The input latch of the first DAC (DAC1) is loaded after the clock signal transitions high. When the clock signal transitions low, the input latch of the second DAC (DAC2) is loaded. The contents of the first input latch are shifted into the DAC1 register on the rising edge of the clock; the contents of the second input latch are shifted into the input register of DAC2 on the falling edge of the clock. Both outputs are updated on alternate phases of the clock.
Standby Mode
To enter the lower power standby mode, connect digital inputs PD and DACEN to DGND. In standby, both the reference and the control amplifier are active, with the current array inactive. To exit this condition, DACEN must be pulled high with PD held at DGND. The MAX5182/MAX5185 typically require 50s to wake up and let both outputs and reference settle.
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Dual, 10-Bit, 40MHz Current/Voltage Alternate-Phase Output DACs
Outputs
The MAX5182 outputs are designed to supply 1mA fullscale output currents into 400 loads in parallel with a 5pF capacitive load. The MAX5185 features integrated 400 resistors that restore the array currents into proportional, differential voltages of 400mV. These differential output voltages can then be used to drive a balun transformer or a low-distortion, high-speed operational amplifier to convert the differential voltage into a singleended voltage. transfer curve) or a line drawn between the endpoints of the transfer function, once offset and gain errors have been nullified. For a DAC, the deviations are measured every single step. Differential Nonlinearity Differential nonlinearity (DNL) (Figure 5b) is the difference between an actual step height and the ideal value of 1LSB. A DNL error specification of less than 1LSB guarantees no missing codes and a monotonic transfer function. Offset Error Offset error (Figure 5c) is the difference between the ideal and the actual offset point. For a DAC, the offset point is the step value when the digital input is zero. This error affects all codes by the same amount and can usually be compensated by trimming.
MAX5182/MAX5185
Applications Information
Static and Dynamic Performance Definitions
Integral Nonlinearity Integral nonlinearity (INL) (Figure 5a) is the deviation of the values on an actual transfer function from either a best-straight-line fit (closest approximation to the actual
7 ANALOG OUTPUT VALUE 6 ANALOG OUTPUT VALUE 5 4 3 2 1 0 000 001 010 011 100 101 110 111 DIGITAL INPUT CODE AT STEP 001 (1/4 LSB ) AT STEP 011 (1/2 LSB )
6 5 4 3 1 LSB 2 1 0 000 001 010 011 100 101 DIGITAL INPUT CODE DIFFERENTIAL LINEARITY ERROR (+1/4 LSB) 1 LSB DIFFERENTIAL LINEARITY ERROR (-1/4 LSB)
Figure 5a. Integral Nonlinearity
Figure 5b. Differential Nonlinearity
7
3 ANALOG OUTPUT VALUE
IDEAL FULL-SCALE OUTPUT GAIN ERROR (-1 1/4 LSB)
ANALOG OUTPUT VALUE
ACTUAL DIAGRAM
6 IDEAL DIAGRAM 5 ACTUAL FULL-SCALE OUTPUT
2 IDEAL DIAGRAM 1 ACTUAL OFFSET POINT IDEAL OFFSET POINT 000 001
OFFSET ERROR (+1 1/4 LSB)
4 0
0
010
011
000 100
101
110
111
DIGITAL INPUT CODE
DIGITAL INPUT CODE
Figure 5c. Offset Error
Figure 5d. Gain Error 11
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Dual, 10-Bit, 40MHz Current/Voltage Alternate-Phase Output DACs MAX5182/MAX5185
Gain Error Gain error (Figure 5d) is the difference between the ideal and the actual full-scale output voltage on the transfer curve, after nullifying the offset error. This error alters the slope of the transfer function and corresponds to the same percentage error in each step. Settling Time Settling time is the amount of time required from the start of a transition until the DAC output settles its new output value to within the converter's specified accuracy. Digital Feedthrough Digital feedthrough is the noise generated on a DAC's output when any digital input transitions. Proper board layout and grounding will significantly reduce this noise, but there will always be some feedthrough caused by the DAC itself. Total Harmonic Distortion Total harmonic distortion (THD) is the ratio of the RMS sum of the input signal's first five harmonics to the fundamental itself. This is expressed as: V22 + V32 + V4 2 + V52 THD = 20 log V1
Grounding and Power-Supply Decoupling
Grounding and power-supply decoupling strongly influence the performance of the MAX5182/MAX5185. Unwanted digital crosstalk may couple through the input, reference, power-supply, and ground connections, which may affect dynamic specifications like signal-to-noise ratio or SFDR. In addition, electromagnetic interference (EMI) can either couple into or be generated by the MAX5182/MAX5185. Therefore, grounding and power-supply decoupling guidelines for highspeed, high-frequency applications should be closely followed. First, a multilayer PC board with separate ground and power-supply planes is recommended. High-speed signals should run on controlled impedance lines directly above the ground plane. Since the MAX5182/ MAX5185 have separate analog and digital ground buses (AGND and DGND, respectively), the PC board should also have separate analog and digital ground sections with only one point connecting the two. Digital signals should run above the digital ground, and plane and analog signals should run above the analog ground plane. Both devices have two power-supply inputs: analog VDD (AVDD) and digital VDD (DVDD). Each AVDD input should be decoupled with parallel 10F and 0.1F ceramic chip capacitors as close to the pin as possible. Their opposite ends should have the shortest possible connection to the ground plane. The DVDD pins should also have separate 10F and 0.1F capacitors, again adjacent to their respective pins. Try to minimize the analog load capacitance for proper operation. For best performance, it is recommended to bypass CREF1 and CREF2 with low-ESR 0.1F capacitors to AVDD. The power-supply voltages should also be decoupled at the point they enter the PC board with large tantalum or electrolytic capacitors. Ferrite beads with additional decoupling capacitors forming a pi network could also improve performance.
where V1 is the fundamental amplitude, and V2 through V5 are the amplitudes of the 2nd- through 5th-order harmonics. Spurious-Free Dynamic Range Spurious-free dynamic range (SFDR) is the ratio of RMS amplitude of the fundamental (maximum signal component) to the RMS value of the next-largest distortion component.
Differential to Single-Ended Conversion
The MAX4108 low-distortion, high-input bandwidth amplifier may be used to generate a voltage from the MAX5182's current array output. The differential voltage across OUT1P (or OUT2P) and OUT1N (or OUT2N) is converted into a single-ended voltage by designing an appropriate operational amplifier configuration as shown in Figure 6.
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Dual, 10-Bit, 40MHz Current/Voltage Alternate-Phase Output DACs MAX5182/MAX5185
+3V +3V AVDD AVDD
10F
0.1F 0.1F 0.1F
10F
0.1F AVDD DVDD CREF1 CREF2 CLK OUT1P OUTPUT1 400* MAX4108 -5V OUT1N 402 400* 402 REFO 0.1F OUT2P OUTPUT2 400* REFR MAX4108 -5V OUT2N 402 400* DGND REN AGND 402 402 +5V 402 402 402 +5V
D0-D9
MAX5182 MAX5185
RSET**
*400 RESISTORS INTERNAL TO MAX5185 ONLY. **MAX5182 ONLY.
Figure 6. Differential to Single-Ended Conversion Using a Low-Distortion Amplifier
Chip Information
TRANSISTOR COUNT: 9464 SUBSTRATE CONNECTED TO AGND
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13
Dual, 10-Bit, 40MHz Current/Voltage Alternate-Phase Output DACs MAX5182/MAX5185
Package Information
QSOP.EPS
14
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Dual, 10-Bit, 40MHz Current/Voltage Alternate-Phase Output DACs MAX5182/MAX5185
NOTES
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15
Dual, 10-Bit, 40MHz Current/Voltage Alternate-Phase Output DACs MAX5182/MAX5185
NOTES
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
16 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 1999 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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